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Today 3D interconnection approaches are considered to provide one of the most promising enabling technologies for “More than Moore” solutions. In particular, 3D integration can provide significant progress in semiconductor device development regarding increased system functionality and integration density. In this paper, we describe an… (More)
Vertical integration of diverse semiconductor technologies can be achieved by utilizing interconnections through entire silicon substrates, known as through silicon vias (TSVs). TSVs present an interesting case study for reliability evaluation, given the particular fabrication technologies, geometries, and potential failure modes associated with such… (More)
Silicon photonics is a new technology that should at least enable electronics and optics to be integrated on the same optoelectronic circuit chip, leading to the production of low-cost devices on silicon wafers by using standard processes from the microelectronics industry. In order to achieve real-low-cost devices, some challenges need to be taken up… (More)
Within this work the development of integrated Micro-HotPlates (μHPs) for gas sensing applications as a System-On Chip (SOC) is presented. As gas sensors exploit resistance variations of sensing materials like SnO<sub>2</sub> at high operating temperatures, integrated μHPs are required for the dynamic and low power operation of these sensors.… (More)
Through wafer interconnects (TWI) with diameters greater than 50 mum have the advantage of extremely low contact resistances. The mechanics of the layers inside the TWI has to be well understood order to avoid passivation cracks. Results of simulation and mechanical investigations are discussed in this paper.
The deposition of a thin tin oxide film allows for the manufacture of modern gas sensors. Spray pyrolysis deposition is used to grow the required thin films, as it can be seamlessly integrated into a standard CMOS processing sequence. A model for spray pyrolysis deposition is developed and implemented within the Level Set framework. Two models for the… (More)
The objective of the European project HELIOS is to combine a photonic layer with a CMOS circuit by different innovative means, using microelectronics processes. Bonding of AWG + Ge Photodiodes on CMOS wafer is achieved.
Depth-resolved IR photoemission microscopy was applied for localization of defects causing leakage currents within Through Si Vias (TSVs). Specifically, analyses of the changes in intensity and spatial distribution of the detected emission, as a function of the focal plane position, allow quantification of the depth of defects within the TSV. Physical… (More)
The deposition of a thin tin oxide film allows for the manufacture of modern gas sensors to replace the bulky sensors of previous generations. Spray pyrolysis deposition is used to grow the required sensing thin films, as it can be seamlessly integrated into a standard CMOS processing sequence. A model for spray pyrolysis deposition is developed and… (More)