Frank Ghenassia

Learn More
Complex systems on chip (SoCs) present challenges in the design and verification process that cannot be adequately addressed by traditional methodologies based on register transfer descriptions. Some of the aspects are efficient design exploration based on component reuse, getting closure on the architecture, as well as early development, integration and(More)
There is tremendous interest in design languages these days - and more particularly, SystemC and SystemVerilog. Sometimes the truth about design languages can be obscured by marketing and the press. This panel is meant to deepen the technical understanding of the DATE audience on the issue of design languages. It contains five technical experts - an(More)
SystemC, users and tool providers are at a crossroads. More and more companies are using SystemC; however EDA companies are hesitant to give a full commitment to SystemC tools, especially at system-level. There are several reasons for this dichotomy. While users seem excited about SystemC for its technical qualities for system-level design, tool providers(More)
Substrate noise affects the performance of mixed signal integrated circuits. Power supply (di/dt) noise is the dominant source of substrate noise. There have been various attempts at the circuit and software levels to estimate this noise. Software-level noise estimation is especially important , as designing noise tolerant circuits for all circumstances may(More)
Design automation in EUROPE needs to be revitalized through a more cooperative approach of problems and solutions. MEDEA has been instrumental in bringing cooperation between process and applications and showing weaknesses of design automation solutions with present players. A new burgeoning eclosion of start up's in strategic areas shows good promises in(More)
  • 1