Francois Rivet

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Many technological bottlenecks prevent from realizing a software radio (SR) mobile terminal. The old way of building radio architectures is now over because a single handled terminal has to address various communication standards. This paper exposes a SR receiver: a sampled analog signal processor (SASP) is designed to perform downconversion and channel(More)
The next generation of mobile terminals is faced with the emergence of the software-defined radio (SDR) concept. The communication devices tend to provide various wireless services through a multi-functional, multi-mode and multi-standard terminal. The SDR concept aims at designing a re-configurable radio architecture accepting all cellular or noncellular(More)
This paper presents the principles of a Sampled Analog Signal Processor (SASP) dedicated to Software Radio mobile device. Many technological bottlenecks are to be overcome. The idea is to design a discrete analog signal processor to challenge theses bottlenecks. The main issue associated with the A/D conversion is thus avoided. The SASP aims to select a(More)
An ultra-low power frequency synthesizer based on a 28-nm CMOS dual-voltage controlled ring oscillator is presented. The technological dispersion and temperature effects are tackled thanks to a Delay locked loop (DLL) which sets a coarse tuning voltage. A back-gate fine tuning voltage is used to lock the oscillating signal on a pure reference with a Phase(More)
This paper introduces a technique for balancing input and output timing of factorial ring owing to achieving higher accuracy as well as reduction of counter delay and reference spurs. Besides, this design offers an 8-bit programmable counter for a more flexible frequency synthesizer. The initial objective was for generating a 2.5GHz signal. However, thanks(More)