Francis Depuydt

Learn More
Integrated circuits in telecommunications and consumer electronics are rapidly evolving towards single chip solutions. New IC architectures are emerging, which combine instruction-set processor cores with customised hardware. This paper describes a high-level synthesis system for integration of real-time signal processing systems on such processor cores.(More)
i Acknowledgements As I sit down and try to come up with a few catchy acknowledgements, I realize that the work in this PhD thesis has been done by a team of people. This is one of the most important things I learned from my promotors Prof. Hugo De Man and Prof. Francky Catthoor, and I wish to sincerely thank them for this. Since this work smells like team(More)
Software pipelining can have an enormous impact on the clock cycle count and hence on the performance of a real-time signal processing design. Because it pays off to invest CPU time in the optimal software pipelining of time-critical parts of a design, an integer programming approach is proposed for simultaneous scheduling and software pipelining. The(More)
In this paper, we address the design of a generic architecture for the management of residential services. The architecture consists of components both at the customers' side as well as at the service provider's side. The key features of the architecture are service modularity, the concept of service sessions, service packaging and subscription. The(More)
  • 1