Fernand Boéri

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This paper presents a new synthesis approach for dedicated systems. The aim of our synthesis scheme is to achieve an automatic exploration of VLIW processor architectures from a pure C description of the input system. The innovation consists in the fact that unit allocation must manage the fact that a function may be realized either by dedicated functional(More)
The major purpose of this paper is to present the partitioninglschedulinglallocation algorithm developed for the CAPSYS method. The aim of this project is to define a tool able to automatically design dedicated and embedded VLIW architectures for large and complex applications. It inherits a sizeable knowledge-pool from the wider field of parallel(More)
The size of Today’s digital systems is increasing very quickly. So design tools have to allow the maximum reusability and an adapted level of description depending on our goals during each part of design cycle. Moreover, systems require more and more heterogeneous competency domain. Then we have to be able to manage the integration of complex and(More)
The Automated Production Systems (APS) are composed of concurrent interacting entities. Then any model should exhibit parallel and sequential behaviours. The Grafcet is now well established in manufacturing to specify the awaited behaviour of the APS. Moreover, programmable components increase modularity and allow a higher integration rate of circuits. This(More)
Know-how is the most useful mean for designing new processors before a complete hardware description. The integration rate is increasing very quickly and the timeto-market has to be dramatically reduced because of the rapid evolution of technology. Therefore, reuse and rapid-prototyping are definitely a major issue to integrate existing architectures and to(More)
This paper describes λ-FLOW, a new functional synchronous dataflow language for DSP applications. It is independent of the handled data. It plainly supports the modular design. Its sound semantics allows proofs of programs and time/memory determinisms. The target code is dynamically loaded into the compiler with a target description that is defined(More)