Felice Crupi

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—A voltage reference circuit operating with all transistors biased in weak inversion, providing a mean reference voltage of 257.5 mV, has been fabricated in 0.18 m CMOS technology. The reference voltage can be approximated by the difference of transistor threshold voltages at room temperature. Accurate sub-threshold design allows the circuit to work at room(More)
—This study aims to understand the potential of bulk FinFET technology from the perspective of sub-and near-threshold logic circuits down to 100-mV bias voltage. Measurements are performed on bulk FinFETs with a channel length of 60 nm, a fin height of 33 nm, and a fin width of only 14 nm and with a high-k/metal-gate stack having an equivalent thickness in(More)
—Ultralow noise measurements often require the application of signal processing and correction techniques to go beyond the noise performances of front-end amplifiers. In this paper, a new method for the voltage noise measurement is proposed, which allows, at least in principle, the complete elimination of the noise introduced by the amplifiers used for the(More)
—We have designed and tested a very low-noise, high-accuracy programmable voltage reference that is intended as an alternative to batteries for the realization of automated low-frequency noise measurement systems. The output voltage, which can be set via a built-in RS232 interface, ranges from 0 to 5 V with a resolution and long-term stability of 250 V. The(More)
—In this paper, the potential of Silicon-Germanium (SiGe) technology for VLSI logic applications is investigated from a circuit perspective for the first time. The study is based on experimental measurements on 45-nm SiGe pMOSFETs with a high-/metal gate stack, as well as on 45-nm Si pMOSFETs with identical gate stack for comparison. In the reference SiGe(More)
In this work we explore the potential of the emerging Germanium technology for logic circuits. We introduce an innovative methodology that extracts the main circuit parameters of interest from experimental measurements on 125 nm high k metal gate Ge pMOSFETs in a Si compatible process flow. Appropriate figures of merit are adopted to highlight the potential(More)
— This study aims to understand the potential of buried Silicon-Germanium (SiGe) technology from the perspective of VLSI logic circuits exploiting aggressive dynamic voltage scaling. Appropriate circuit-and system-level metrics are extracted from wafer-level measurements on 45nm SiGe pMOSFETs with a high-k/metal gate stack and systematically benchmarked to(More)
—In this paper, after discussing some important limitations of the most common circuital configuration that is used for the realization of very low-noise transimpedance amplifiers, we propose and analyze a new circuit topology which allows us to obtain significant advantages as far as equivalent input current noise and bandwidth (BW) are concerned. We(More)