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  • Farn Wang
  • International Journal on Software Tools for…
  • 2003
We investigate the effect on efficiency of various design issues for BDD-like data structures of TA state space representation and manipulation. We find that the efficiency is highly sensitive to decision atom design and canonical form definition. We explore the two issues in detail and propose to use CRD (Clock-Restriction Diagram) for TA state space(More)
  • Farn Wang
  • IEEE Transactions on Software Engineering
  • 2004
We introduce a new BDD-like data structure called hybrid-restriction diagrams (HRDs) for the representation and manipulation of linear hybrid automata (LHA) state-spaces and present algorithms for weakest precondition calculations. This permits us to reason about the valuations of parameters that make safety properties satisfied. Advantages of our approach(More)
A new data-structure called DDD (Data-Decision Diagram) for the fully symbolic model-checking of real-time software systems is proposed. DDD is a BDD-like data-structure for the encoding of regions 2]. Unlike DBM which records diierences between pairs of clock readings, DDD only uses one auxiliary binary variable for each clock. Thus the number of variables(More)
Abs t rac t . In this paper, we examine the subclass of RTL formulas considered in [14, 15] which we call path RTL. We propose a formal semantic extension of path RTL covering nonexistent event occurrences and show that all systems specified in path RTL can be reduced to systems which have infinitely many occurrences of all event types. We then show the(More)
Inevitability properties in branching temporal logics are of the syntax foralldiamphi, where phi is an arbitrary (timed) CTL (computation tree logic) formula. Such inevitability properties in dense-time logics can be analyzed with the greatest fixpoint calculation. We present algorithms to model-check inevitability properties. We discuss a technique for(More)
ÐA compositional verification method from a high-level resource-management standpoint is presented for dense-time concurrent systems and implemented in the tool of SGM (State-Graph Manipulators) with graphical user interface. SGM packages sophisticated verification technology into state-graph manipulators and provides a user interface which views(More)
We extend a TCTL model-checking problem to a parametric timing analysis problem for real-time systems and develop new techniques for solving it. The algorithm we present here accepts timed transition system descriptions and parametric TCTL formulas with timing parameter variables of unknown sizes and can give back general linear equations of timing(More)