Faiq Khalid Lodhi

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Reliable transferring of data from one clock domain to another requires synchronization. Therefore, synchronizers play an important role in clock domain crossing (CDC). But despite their wide applications, there is no standard quantitative metric available to analyze various synchronizer configurations on common grounds. To overcome this limitation, this(More)
Advancement in deep submicron (DSM) technologies led to miniaturization. However, it also increased the vulnerability against some electrical and device non-idealities, including the soft errors. These errors are significant threat to the reliable functionality of digital circuits. Several techniques for the detection and deterrence of soft errors (to(More)
These days Analog and Mixed signal (AMS) circuits are widely being designed and used in many safety and financial critical application domains. This fact brings the challenge of efficiently and accurately analyzing of these AMS circuits as an analysis error could result in a big financial loss. Traditionally, AMS circuits have been analyzed using(More)
Globalization trends in integrated circuit (IC) design are leading to increased vulnerability of ICs against hardware Trojans (HT). Recently, several side channel parameters based techniques have been developed to detect these hardware Trojans that require golden circuit as a reference model, but due to the widespread usage of IPs, most of the(More)
This study presents a digital phase detector-based approach for estimating and synchronising phase variations between clock domains. Instead of waiting for the resolution of metastability (with finite probability of failure), the authors propose a metastability avoidance algorithm, based on a sampling method for asynchronous signals. The results, using 90(More)