Fadoi Lakhal

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  • A. Albinet, S. Begoc, +6 authors M.-A. Peraldi-Frati
  • 2007
This paper presents a model-based methodology for requirements expression, traceability and verification. The methodology relies on the EAST-ADL2 framework and two of the UML2 profiles: MARTE for real-time embedded systems and SysML for system requirements modelling. The methodology defines the different models used at each abstraction level of the process.(More)
Requirements traceability modeling is a key issue in real-time embedded design process. In such systems, requirements are of different nature (software-related, system-related, functional or non functional) and must be traced through a multilevel design flow which integrates multiple tools and heterogeneous models. Validation and Verification (V&V)(More)
UML profiles are a frequently used alternative to describe the abstract syntax of modeling languages. As any abstract syntax, UML profiles evolve through time. As UML profiles are used for models definition, their evolutions may have a direct impact on them. The adaptation costs of these models may be as important as redefining a complete new model from(More)
The abstract syntax of a modeling language evolves all along the life-cycle of this language with its successive versions and these evolutions can have important repercussions on the models described in this language. We study the evolutions of the abstract syntax when this syntax is defined by a UML profile. More particularly, we are interested in the UML(More)
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