Fabrizio Stefani

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The Remote Didactic Laboratory Laboratorio Didattico Remoto - LA.DI.RE. "G. Savastano" is the e-learning measurement laboratory supported by the Italian Ministry of Education and University. It involves about twenty Italian universities and provides the students of electric and electronic measurement courses with the access to remote measurement(More)
− An appropriate choice of the computing devices employed in digital signal processing applications requires to characterize and to compare various technologies, so that the best component in terms of cost and performance can be used in a given system design. In this paper, a benchmark strategy is presented to measure the performances of various types of(More)
Power consumption is a key point in the design of high-speed switched capacitor (SC) circuits, which efficiently implement a number of analog functions. Among them, SC modulators are very popular for analog-to-digital conversion. In this kind of circuit, operational amplifiers are the most consuming cells because of their requirements in terms of dc-gain(More)
The Remote Didactic Laboratory Laboratories Didattico Remoto - LA.DI.RE. "G. Savastano" is the e-learning measurement laboratory supported by the Italian Ministry of Education and University. It provides the students of electric and electronic measurement courses with the access to remote measurement laboratories delivering different didactic activities(More)
This paper deals with a novel testing technique aimed at estimating the accuracy of analog-to-digital converters (ADCs). The main advantage of the proposed approach is the higher testing speed, particularly the ability to achieve an accurate estimate of the low-frequency component (LCF) of the integral nonlinearity (INL) pattern of an ADC in a time that may(More)
This paper deals with a novel testing technique aimed at estimating the accuracy of analog-to-digital converters (ADC's). Compared with other valuable research results, the main advantage of the proposed approach is the higher testing speed, i.e. the ability of achieving an accurate estimate of the low frequency component of an INL pattern in a shorter time(More)
In this paper, the performance of a CDMA system using digital frequency conversion is analyzed and modeled. The joint effect of channel noise, sampling jitter and ADC errors is discussed and modeled assuming uniform converters. Variable resolution PCM and /spl Sigma//spl Delta/ A/D converters are considered, and the sensitivities of the resulting systems to(More)
Ab strac t – This paper deals with an innovative strategy to shorten the record size required to estimate the Integral Non-Linearity (INL) of Analog-to-Digital Converters (ADC's) through the so-called Sinewave Histogram Test (SHT). Such a size reduction is achieved by low-pass filtering the collected sequences of test samples using a simple moving average(More)