Fabrizio Riente

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Many <i>facts</i> about emerging nanotechnologies are yet to be assessed. There are still major concerns, for instance, about maximum achievable device density, or about which architecture is best fit for a specific application. Growing complexity requires taking into account many aspects of technology, application and architecture <i>at the same time</i>.(More)
Among the emerging technologies Field-Coupled devices like Quantum dot Cellular Automata are one of the most interesting. Of all the practical implementations of this principle NanoMagnet Logic shows many important features, such like a very low power consumption and the feasibility with up-to-date technology. However its working principle, based on the(More)
In most computational systems memory access represents a relevant bottleneck for circuits performance. The execution speed of algorithms is severely limited by memory access time. An emerging technology like Nano Magnet Logic (NML), where its magnetic nature leads to an intrinsic memory ability, represents therefore a very promising opportunity to solve(More)
Porto, the institutional repository of the Politecnico di Torino, is provided by the University Library and the IT-Services. The aim is to enable open access to all the world. Please share with us how this access benefits you. Your story matters. Abstract—We automatically maximize fault-tolerance in nanoarrays based on silicon nanowires and Gate-All-Around(More)
Nano-Magnetic Logic (NML) is a promising candidate to substitute CMOS technology since it is characterized by very low power consumption and it can combine computation and memory in the same device. Several works analyze this technology at device level; nevertheless a higher level analysis is required to fully understand its potentials. It is actually(More)
Perpendicular Nanomagnetic logic (pNML) is one emerging beyond-CMOS technology listed in the ITRS roadmap for next-generation computing due to its non-volatility, monolithic 3D-Integration, small size scalability and low power consumption. Here, we demonstrate the feasibility of a monolithic 3D pNML circuit, which is capable of integrating both memory and(More)
In the last decades, the CMOS technology has undergone an extraordinary evolution. Because of the continuous scaling process, CMOS transistors are now so small that millions can be easily fitted in a single chip. Shrinking transistor sizes have complex consequences on the performance of both the transistor itself and the system that is based upon it.(More)
To meet the challenges associated with transistor scaling and short channel devices, the structure of MOS devices has undergone an incredible evolution. From Bulk devices, technology has shifted through Silicon-On-Insulator (SOI) devices, reaching now FinFET transistors, the next steps in the evolutionary path are represented by Gate-All-Around (GAA) and(More)