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A novel approach to testing lookup table (LUT) based field programmable gate arrays (FPGAs) is proposed in this paper. A general structure for the basic configurable logic array blocks (CLBs) is assumed. We group k CLBs in the column into a cell, where k denotes the number of inputs of an LUT. The whole chip is configured as a group of one-dimensional(More)
—This paper presents a novel design of ternary logic gates using carbon nanotube (CNT) FETs (CNTFETs). Ternary logic is a promising alternative to the conventional binary logic design technique, since it is possible to accomplish simplicity and energy efficiency in modern digital design due to the reduced circuit overhead such as interconnects and chip(More)
Neuronal avalanches, measured in vitro and in vivo, exhibit a robust critical behavior. Their temporal organization hides the presence of correlations. Here we present experimental measurements of the waiting time distribution between successive avalanches in the rat cortex in vitro. This exhibits a nonmonotonic behavior not usually found in other natural(More)
There has been considerable research on quantum dot cellular automata (QCA) as a new computing scheme in the nano-scale regimes. The basic logic element of this technology is majority voter. In this paper, a detailed simulation-based characterization of QCA defects and study of their effects at logic-level are presented. Testing of these devices is(More)
This paper analyzes the deposition defects in devices and circuits made of Quantum-dot Cellular Automata (QCA) for molecular implementation. Differently from metal-based QCA, in this type of implementation a defect may occur due to the erroneous deposition of cells (made of molecules) on a substrate, i.e. no cell, or an additional cell is placed either(More)