Fa Foster Dai

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This paper presents a novel direct digital frequency synthesis (DDFS) ROM compression technique based on two properties of a sine function: (a) piecewise linear technique to approximate a sinusoid, and (b) variation in the slope of the sinusoid at different phase angles. In the proposed DDFS architecture the ROM stores a few of the sinusoidal values, and(More)
This paper presents a low power, ultra high speed and high resolution SiGe DDS MMIC with 24-bit phase and 10-bit amplitude resolution. The DDS MMIC has the capabilities of direct frequency and phase modulations with 24 bit and 12 bit resolution, respectively. It is the first reported mm-wave DDS with direct digital frequency and phase modulation(More)
A novel 12-bit Vernier ring time-to-digital converter (TDC) with 8ps of time resolution for digital-phase-locked-loop applications is presented. The TDC achieves a large detectable range of 32ns. The core of the TDC occupies 0.75 x 0.35 mm 2 in a 0.13um CMOS technology. The total power consumption for the entire TDC chip is only 7.5mW with a 1.5V power(More)
We propose replica techniques with statistical post processing to improve integral non-linearity (INL) and code distribution performance of time-to-digital converters (TDC). We consider three different types of TDC namely: vernier delay line, multi-resolution, and ring oscillator based. We show that using a replica delay line with additional digital(More)
A 2.4 GHz radio frequency receiver front end with an on-chip transformer compliant with IEEE 802.11b/g standards is presented. Based on zero-IF receiver architecture, the front end comprises a variable gain common-source low noise amplifier with an on-chip transformer as its load and a high linear quadrature folded Gilbert mixer. As the load of the LNA, the(More)
A 2.4GHz receiver front-end with on-chip balun implemented with 0.13um CMOS technology is presented in this paper. Based on direct-conversion architecture, the front-end comprises a two-stage LNA (low noise amplifier) with optimized on-chip transformer and quadrature passive mixer. The g<inf>m</inf>-boosting technique is employed in 1<sup>st</sup> stage of(More)
— This paper presents an 8-18GHz wideband receiver with superheterodyne topology. In order to save power, both RF and IF signals share the tunable transconductance stage. The IF output of the first mixer is fed to its tunable input stage for IF amplification in a recursive manner, which significantly enhances the gain tuning without increasing the power.(More)
This work presents a 1.9~5.6 GHz fractional-N DPLL with digi-phase spur canceller. It utilizes a ramp signal generated from the fractional-N accumulator to automatically calibrate the TDC linearity. The chip also includes an MMD that overcomes the division ration skipping problem associated with the prior art MMDs. The ADPLL achieves a worst fractional spur(More)
A new 'off-on' type Al 3+-selective fluorescent probe derived from benzoyl hydrazine has been synthesized and characterized. This probe shows high selectivity towards Al 3+ compared to other common metal ions, and complexing with Al 3+ triggers a new bond at 450 nm. With optimized conditions, the probe gives a linear response of 8.9×10