F. Brandner

Publications58
h-index14
Citations688
Highly Influential Citations42
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SPUR: a trace-based JIT compiler for CIL
TLDR
We propose a trace JIT for Microsoft's Common Intermediate Language CIL (the target language of C#, VisualBasic, F#, and many other languages). Expand
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A Statically Scheduled Time-Division-Multiplexed Network-on-Chip for Real-Time Systems
TLDR
This paper explores the design of a circuit-switched network-on-chip (NoC) based on time-division multiplexing (TDM) for use in hard real-time systems. Expand
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Static routing in symmetric real-time network-on-chips
TLDR
We propose to use a statically scheduled, time-division-multiplexed NoC design that allows a decoupled analysis of individual real-time tasks. Expand
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Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach
TLDR
We present Patmos, a dual-issue, statically scheduled RISC processor optimized for low WCET bounds rather than high average case performance. Expand
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Stack allocation of objects in the CACAO virtual machine
TLDR
We have implemented a lightweight and fast escape analysis within the CACAO Java Virtual Machine to enable stack allocation of thread-local Java objects. Expand
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Generalized instruction selection using SSA-graphs
TLDR
We propose an optimal technique for instruction selection that uses Static Single Assignment (SSA) graphs as an intermediate representation of programs and employs the Partitioned Boolean Quadratic Problem (PBQP) for finding an optimal instruction selection. Expand
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Lazy Spilling for a Time-Predictable Stack Cache: Implementation and Analysis
TLDR
The growing complexity of modern computer architectures increasingly complicates the prediction of the run-time behavior of software. Expand
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Fast and Accurate Simulation using the LLVM Compiler Framework ?
Development of future generation computer architectures requires fast and accurate simulation tools that allow to test, verify, and analyze the behavior of the given architecture along with the… Expand
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Studying optimal spilling in the light of SSA
TLDR
We study the notion of optimal spilling (what can be expressed?) and the impact of SSA form (does it help?). To identify the important features for optimal spilling on load-store architectures, we develop a new integer linear programming formulation, more accurate and expressive than previous approaches. Expand
  • 10
  • 1
Shedding the Shackles of Time-Division Multiplexing
TLDR
We present dynamic arbitration schemes that are based on TDM. Expand
  • 15
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