• Publications
  • Influence
A Bipolar-Selected Phase Change Memory Featuring Multi-Level Cell Storage
In this paper, a 90-nm 128-Mcell non-volatile memory based on phase-change Ge2-Sb2-TeB alloy is presented. Memory cells are bipolar selected, and are based on a /xtrench architecture. ExperimentalExpand
  • 251
  • 22
The CDF-II detector: Technical design report
  • 156
  • 13
A Multi-Level-Cell Bipolar-Selected Phase-Change Memory
Phase-change memory (PCM) is becoming widely recognized as the most likely candidate to unify the many memory technologies that exist today (Lee, et al., 2007). The combination of non-volatileExpand
  • 105
  • 7
A 90nm 4Mb embedded phase-change memory with 1.2V 12ns read access time and 1MB/s write throughput
A 90 nm 4 Mb embedded phase-change memory (PCM) is presented, demonstrating the feasibility of PCM integration with 3 masks overhead in a 6-ML standard CMOS process. Using a low-voltage NMOSExpand
  • 55
  • 6
Novel and recurrent TRPV4 mutations and their association with distinct phenotypes within the TRPV4 dysplasia family
Background Mutations in TRPV4, a gene that encodes a Ca2+ permeable non-selective cation channel, have recently been found in a spectrum of skeletal dysplasias that includes brachyolmia,Expand
  • 53
  • 4
  • PDF
4-Mb MOSFET-selected phase-change memory experimental chip
This paper presents a 4-Mb phase-change memory experimental chip using an MOS transistor as a cell selector. A cascode bit-line biasing scheme allows read and write voltages to be fed to the storageExpand
  • 27
  • 3
  • PDF
4-Mb MOSFET-selected μtrench phase-change memory experimental chip
A μtrench Phase-Change Memory (PCM) cell with MOSFET selector and its integration in a 4-Mb experimental chip fabricated in 0.18-μm CMOS technology are presented. A cascode bitline biasing schemeExpand
  • 32
  • 3
A 4 Mb LV MOS-Selected Embedded Phase Change Memory in 90 nm Standard CMOS Technology
A 4 Mb embedded phase change memory macro has been developed in a 90 nm 6-ML CMOS technology. The storage element has been integrated using 3 additional masks with respect to process baseline. TheExpand
  • 37
  • 2
Set-sweep programming pulse for phase-change memories
This paper presents a non-conventional program pulse approach for phase-change memories (PCMs). The cell programming curve is experimentally evaluated and discussed. The proposed set-sweep programExpand
  • 8
  • 1
  • PDF
A low-power low-voltage MOSFET-only voltage reference
A low-power low-voltage MOSFET-only voltage reference featuring very good temperature stability and referred to the positive power supply is proposed. It compensates for the temperature dependence ofExpand
  • 7
  • 1
  • PDF