F. Monsieur

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This paper reviews the main challenges for the TCAD of 14nm Fully-Depleted Silicon-On-Insulator (FDSOI) technology performance assessment. Thanks to a multi-scale approach combining extensive electrical characterization and advanced solvers simulations, ensuring deep physical insight, we provide TCAD simulation framework for device layout optimization,(More)
High performance bipolar transistors were investigated under both reverse and forward stress conditions. Although classical hot-carrier induced degradation has been shown in reverse mode, the results obtained under forward conditions were not in line with those reported for previous device generation. Indeed, the coupled approach using low frequency noise(More)
This paper presents new reliability investigations on CMOS transistors for active pixels sensors (APS) applications. Reliability tests under sunlight illumination show an ageing effect of the transistors. The dependence of the degradation with light intensity and stress bias has been studied. The use of borderless silicon nitride is suspected to be(More)
This paper investigates the mobility `apparent' channel length dependency in nanometric devices. Based on a series of current and capacitance measurements, we report clear (V<sub>G</sub>)<sup>-1</sup> dependencies of the access resistance in Bulk but also in FDSOI devices. We show that the &#x03BC;<sub>eff</sub>-L<sub>eff</sub> degradation observed at small(More)
A complete TCAD model addressing Hot Carrier Degradation for Flash technology is presented. After having underlined the need for a power law with a low exponent for the aging kinetics and considered a high activation energy reflecting the single electron impact mode, a fine calibration is achieved. Finally, analysis on trap distribution and aging rates at(More)
In recent papers conduction mechanism in tantalum pentoxide MIM capacitors was found to follow the space charge limited theory and the asymmetry between positive and negative polarization was attributed to an inhomogeneous spatial distribution of traps. Furthermore, the role of the top electrode geometry on the conduction was highlighted using a large range(More)
This work shows the interaction between the hydrogen release at the interface (interface traps creation) and the generation of oxide defects (as monitored by SILC). Besides, temperature dependence as well as pre-stress experiments clearly demonstrate that the diffusion-limited model cannot explain the hydrogen release time dynamics. A new disorder-related(More)
Based on capacitive measurements combined with TCAD simulations, in a wide range of bulk biases, the impact of NBTI on both oxide-silicon interfaces of FDSOI transistors is evaluated. Physical modeling is proposed to fully analyze the degradation mechanisms and reproduce the experimental behaviors through the help of accurate simulations of the back bias(More)
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