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Journals and Conferences
A multivalued integrated injection logic scheme and its application to the realization of a full adder is described in this correspondence. The integrated full adder is implemented and fabricated using V-groove isolated I/SUP 2/L technology. Results obtained on the experimental structures indicate that the multivalued full adder offers an increase in… (More)
A new integrated circuit process is presented which permits the simultaneous fabrication of n-p-n bipolar transitors and p-channel silicon-gate VMOS transistors. The technology involves no extra processing steps compared to the bipolar process. Test results are presented for the resulting VMOS devices.