F. Bodin

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In order to minimize code size overhead on VLIW ar-chitectures, compilers for embedded processors have to pay higher attention on code optimization than on compilation time. Thus, the rst demand on compiler for embedded processors consists in spending instruction memory space for optimization only if the associated performance improvement justiies it. In(More)
Many media processors 28, 7, 14, 8, 18, 27], used for computing intensive embedded applications, are VLIW architectures that rely on the compiler to exploit Instruction Level Parallelism. Loop unrolling is generally used to expose instruction parallelism but computing the unrolling factor is very diicult as instruction cache misses and spill code can cancel(More)
This article consists of a collection of slides from the author's conference presentation. Some of the specific areas/topics discussed include: Directive-based programming Taking into account hardware heterogeneity; CAPS source to source technology; Auto-tuning in CAPS compiler; and OpenACC in an Exascale perspectives.
Shared virtual memory (svm) is a software abstraction of shared memory for parallel architectures which have no hardware support for shared memory. In this paper, we describe a programming environment for the Paragon XP/S based on shared virtual memory. This environment is constituted of a runtime (myoan) which implements the shared memory abstraction, a(More)
To simplify the programming of hierarchical and distributed-memory parallel systems, the notion of shared virtual memory (SVM) has been proposed. This abstraction provides the programmer with the illusion of a at global address space and coherence is maintained at the page level. The success of this abstraction depends on the eeciency of page management.(More)