Euji Tamura

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In modern computers, memory hierarchies play a paramount role in improving the average execution time. However, this fact is not so important in real-time systems, where the worst-case execution time is what matters the most. System designers must use complex analyses to guarantee that all tasks meet their deadlines. As an alternative to making those(More)
Locking caches, providing full determinism and good performance , are a very interesting solution to replacing conventional caches in real-time systems. In such systems, temporal correctness must be guaranteed. The use of predictable components, like locking caches, helps the system designer to determine if all the tasks will meet its deadlines. However,(More)
This paper describes newly developed techniques suitable for logic verification and fault simulation of digital systems which are mainly composed of LSI's and MSI's. A simulator employing such techniques has been implemented, and has shown definite advantages over existing simulators.
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