Ernst Christen

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With the growing trend in ASIC design to include more analog functions on chip, various design support and automation efforts have arisen to address the analog design concerns. Existing hardware description languages have been widely used for design representation, documentation and transfer mainly in the digital domain, with standards such as VHDL being(More)
Creating a Robust Design requires that the operating conditions of each component of the design are carefully measured and compared with its Safe Operating, a task commonly referred to as stress analysis. In this paper we analyze the relationship between the component stress and the Safe Operating Area. We summarize the requirements of describing the Safe(More)
The design objectives [1] have been compiled from requirements submitted by interested parties to the working group. They require the VHDL 1076.1 language to be a superset of VHDL 1076-1993 [2], supporting the hierarchical description and the simulation of continuous and mixed continuous/discrete systems with conservative and nonconservative semantics. The(More)