Ernst Christen

Learn More
With the growing trend in ASIC design to include more analog functions on chip, various design support and automation efforts have arisen to address the analog design concerns. Existing hardware description languages have been widely used for design representation, documentation and transfer mainly in the digital domain, with standards such as VHDL being(More)
Creating a Robust Design requires that the operating conditions of each component of the design are carefully measured and compared with its Safe Operating, a task commonly referred to as stress analysis. In this paper we analyze the relationship between the component stress and the Safe Operating Area. We summarize the requirements of describing the Safe(More)
Acknowledgements I must start by thanking my supervisor, Oded Maler, whose benevolent guidance, support , encouragement, and trust were essential to this thesis being what it is – tautology intended. Working alongside Oded was a stimulating and rewarding experience, and I learned a great deal in the process, from theoretical to practical aspects of(More)
The VHDL 1076.1 language satisfies a set of requirements that have been documented in the 1076.1 Design Objective Document (IEEE PAR 1076.1 1995). It builds on two major foundations, the VHDL 1076 language and the theory of differential/algebraic equations (DAEs). The design objectives [1] have been compiled from requirements submitted by interested parties(More)