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In this letter we report on high-frequency measurements on vertically standing III-V nanowire wrap-gate MOSFETs (metal-oxide-semiconductor field-effect transistors). The nanowire transistors are fabricated from InAs nanowires that are epitaxially grown on a semi-insulating InP substrate. All three terminals of the MOSFETs are defined by wrap around(More)
Various parameters of fibrinolysis inhibition and the plasma concentration of fibronectin (alpha 2-surface binding glycoprotein, cold insoluble globulin) were measured in patients at risk of developing acute progressive respiratory sufficiency following trauma or sepsis - the delayed microembolism syndrome (DMS). Most parameters measuring fibrinolysis(More)
An n-type InAs/InAsP heterostructure nanowire field-effect transistor has been fabricated and compared with a homogeneous InAs field-effect transistor. For the same device geometry, by introduction of the heterostructure, the threshold voltage is shifted 4 V, the maximum current on-off ratio is enhanced by a factor of 10,000, and the subthreshold swing is(More)
The ever-growing demand on high-performance electronics has generated transistors with very impressive figures of merit (Radosavljevic et al., IEEE Int. Devices Meeting 2009, 1-4 and Cho et al., IEEE Int. Devices Meeting 2011, 15.1.1-15.1.4). The continued scaling of the supply voltage of field-effect transistors, such as tunnel field-effect transistors(More)
This study presents a novel approach for indirect integration of InAs nanowires on 2'' Si substrates. We have investigated and developed epitaxial growth of InAs nanowires on 2'' Si substrates via the introduction of a thin yet high-quality InAs epitaxial layer grown by metalorganic vapor phase epitaxy. We demonstrate well-aligned nanowire growth including(More)
In this paper, we correlate the growth of InAs nanowires with the detailed interface trap density (Dit) profile of the vertical wrap-gated InAs/high-k nanowire semiconductor-dielectric gate stack. We also perform the first detailed characterization and optimization of the influence of the in situ doping supplied during the nanowire epitaxial growth on the(More)
We present dc and RF characterization of InAs nanowire field-effect transistors (FETs) heterogeneously integrated on Si substrates in a geometry suitable for circuit applications. The FET consists of an array of 182 vertical InAs nanowires with about 6-nm HfO<sub>2</sub> high-<i>k</i> gate dielectric and a wrap-gate length of 250 nm. The transistor has a(More)
We examine the feasibility of developing bipolar transistors with current-gain and power-gain cutoff frequencies of 1-3 THz. High bandwidths are obtained by scaling; the critical limits to such scaling are the requirements that the current density increase in proportion to the square of bandwidth and that the metal-semiconductor contact resistivities vary(More)