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Advances in semiconductor process and design technology enable the design of complex system chips. Traditional IC design, in which every circuit is designed from scratch and reuse is limited to standard-cell libraries, is more and more replaced by a design style based on embedding large reusable modules, the so-called cores. This core-based design poses a(More)
Test access mechanisms (TAMs) and test wrappers are integral parts of a system-on-chip (SOC) test architecture. Prior research has concentrated on only one aspect of the TAM /wrapper design problem at a time, i.e., either optimizing the TAMs for a set of pre-designed wrappers, or optimizing the wrapper for a given TAM width. In this paper, we address a more(More)
The testing time for a system-on-chip (SOC) is determined to a large extent by the design of test wrappers and the test access mechanism (TAM). Wrapper/TAM co-optimization is therefore necessary for minimizing SOC testing time. We recently proposed an exact technique for co-optimization based on a combination of integer linear programming (ILP) and(More)
The main objective of core-based IC design is improvement of design efficiency and time-to-market. In order to prevent test development from becoming the bottleneck in the entire development trajectory, reuse of pre-computed tests for the reusable pre-designed cores is mandatory. The core user is responsible for translating the test at core level into a(More)
Integrated circuits are increasingly designed by embedding pre-designed reusable cores. IEEE P1500 Standard for Embedded Core Test (SECT) is a standard-under-development that aims at improving ease of reuse and facilitating interoperability with respect to the test of such core-based ICs, especially if they contain cores from different sources. This paper(More)
System chips are increasingly designed by embedding reusable cores. A core-based test strategy for such ICs is often attractive and sometimes even mandatory. IEEE P1500 SECT is a standard under development that standardizes a Core Test Language and a Core Wrapper, in order to facilitate plug-n-play core testing. In this paper, we describe how one standard(More)
A wrapper is a thin shell around the core, that provides the switching between functional, and core-internal and core-external test modes. Together with a test access mechanism (TAM), the core test wrapper forms the test access infrastructure to embedded reusable cores. Various company-internal as well as industry-wide standardized but scalable wrappers(More)