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Three-dimensional (3D) shape models are powerful because they enable the inference of object shape from incomplete, noisy, or ambiguous 2D or 3D data. For example, realistic parameterized 3D human body models have been used to infer the shape and pose of people from images. To train such models, a corpus of 3D body scans is typically brought into(More)
Exploiting the high-potential of nanoscale architectures requires that they be controlled by CMOS technology. Such an interface, a decoder, must control many nanowires (NWs) with a small number of meso-scale wires (MWs). Multiple types of decoder have been proposed, each of which can be modelled as embedding resistive switches in NWs. In this paper we(More)
Peer-to-peer systems have been proposed for a wide variety of applications, including file-sharing, web caching, distributed computation, cooperative backup, and onion routing. An important motivation for such systems is self-scaling. That is, increased participation increases the capacity of the system. Unfortunately, this property is at risk from selfish(More)
A key challenge facing nanotechnologies is learning to control uncertainty introduced by stochastic self-assembly. In this article, we explore architectural and manufacturing strategies to cope with this uncertainty when assembling nanoarrays, crossbars composed of two orthogonal sets of parallel nanowires (NWs) that are differentiated at their time of(More)
A key challenge that face nanotechnologies is controlling the uncertainty introduced by stochastic self-assembly. In this paper we explore architectural and manufacturing strategies to cope with this uncertainty when assembling nanoarrays, crossbars composed of two orthogonal sets of coded parallel nanowires. Because the encodings of nanowires that are(More)
Methods for assembling crossbars from nanowires (NWs) have been designed and implemented. Methods for controlling individual NWs within a crossbar have also been proposed, but implementation remains a challenge. A NW decoder is a device that controls many NWs with, a much smaller number of lithographically produced mesoscale wires (MWs). Unlike traditional(More)
In recent years, a number of nanoscale devices have been demonstrated that act as wires and gates. In theory, these devices can interconnect to form general purpose architectures. Unfortunately, our ability to place individual devices is poor, and device reliability may be substantially lower than that of current CMOS technology. Nanoscale architectures(More)