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Reconfigurable computing technology offers leap ahead performance, e.g. 10X ops per watt and/or ops per cubic inch, over general purpose programmable solutions without the need to develop custom hardware. However, today generation of a working implementation requires hardware design expertise and generation of a good implementation requires many slow(More)
A perennial problem in the process of developing signal processing systems is identifying an architecture which meets the computational and memory needs of the algorithm yet is still affordable in terms of cost, size, and complexity. To aid in making this decision, an architecture trade tool, using the Ptolemy kernel, has been developed. The purpose of this(More)
Developing multiprocessor systems to implement high performance signal processing algorithms can be a formidable undertaking. A process for designing multiprocessor systems , using primarily programmable processors, is proposed here. This design process starts with algorithm entry and analysis, continues with functional decomposition and architecture entry,(More)
A technique for linear FM chirp signal detection on a COTS Field Programmable Gate Array (FPGA) based reconfigurable computing testbed has been implemented. The scheme used for signal detection was based on a semi-coherent method originated by Lank, et al[1]. The scheme developed addresses, in an adaptive computing environment, the detection of a family of(More)
Our team is developing an integrated algorithm analysis and mapping environment for migrating a dataflow representation of a signal processing algorithm into an Adaptive Computing System (ACS) consisting of FPGAs. This environment allows designers to transform signal processing algorithms into FPGA-based hardware faster, by an order of magnitude, than is(More)
The purpose of this study was to develop and evaluate a new VHDL-based performance modeling capability for multiprocessor systems. 1 The framework for this methodology involved modeling the following system aspects: processor characterization, task modeling, network characterization, and data set size. Initially, all aspects are specified at a high (or(More)
Extended Abstract We are developing an integrated algorithm analysis and mapping environment particularly tailored for signal processing applications on Adaptive Computing Systems ACS. Our environment allows a designer to map signal processing algorithms to an ACS faster, by an order of magnitude, than is currently possible. Our approach has been to focus(More)
The purpose and goals of performance modeling for multiprocessor systems using a token-based methodology in VHDL are discussed. Following this motivation, a framework for performance modeling is described, which involves modeling hardware and software at different levels of abstraction; the scope of this paper primarily addresses the high profile(More)
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