Learn More
In this paper, we explore the use of multi-band radio frequency interconnect (or RF-I) with signal propagation at the speed of light to provide shortcuts in a many core network-on-chip (NoC) mesh topology. We investigate the costs associated with this technology, and examine the latency and bandwidth benefits that it can provide. Assuming a 400(More)
As chip multiprocessors scale to a greater number of processing cores, on-chip interconnection networks will experience dramatic increases in both bandwidth demand and power dissipation. Fortunately, promising gains can be realized via integration of Radio Frequency Interconnect (RF-I) through on-chip transmission lines with traditional interconnects(More)
In this paper, we propose a new way of implementing on-chip global interconnect that would meet stringent challenges of core-to-core communications in latency, data rate, and re-configurability for future chip-microprocessors (CMP) with efficient area and energy overheads. We discuss the limitation of traditional RC-limited interconnects and possible(More)
— Digital control of the effective dielectric constant of a differential mode transmission line is shown up to 60GHz in standard CMOS technology. The effective dielectric constant is shown to increase from 5 to over 50 for the fixed artificial dielectric case. The digital controlled artificial dielectric transmission line (DiCAD) uses MOS switches to(More)
A technique for generating multiple mm-wave carrier frequencies is introduced, using simultaneous sub-harmonic injection locking of multiple VCOs to a single reference frequency. A prototype of 30 GHz and 50 GHz sub-harmonic injection-locked VCOs is realized in a 90 nm digital CMOS process and able to lock from 2<sup>nd</sup> to 8<sup>th</sup> harmonic of(More)
This paper present a D-band signal source based on a 2<sup>nd</sup> harmonic generation of a differential Colpitts VCO that fabricated on 65 nm CMOS process. It covers a frequency range from 159 GHz to 169 GHz with a total tuning range of 5.8%. It provides -3.8 dBm at 163.5 GHz with a nominal supply voltage of 1.2 V while consuming a DC current of 25 mA and(More)
Third-harmonic current generation in a CMOS transistor is modeled and analyzed including the effects of large-signal clipping and high-frequency roll-off for the application of millimeter-wave (mm-wave) frequency multipliers. Using the model and introducing harmonic rejection techniques, a wideband 8.5-dBm output-power x9 frequency multiplier from(More)
A new technique using left-handed resonator to generate multi-band mm-wave carrier signal is proposed in this paper. The left-handed resonator exhibits non-linear dispersion characteristic which enables uneven spacing between resonant frequencies. A dual band mm-wave oscillator in 90nm CMOS technology is implemented to demonstrate this new technique. Using(More)
Two fundamental oscillators, a 240 GHz and a 272 GHz are demonstrated using the IBM CMOS 32 nm process. The design of both oscillators was based on a Colpitts differential topology, where parasitic capacitances of the device are used as a part of the inductor-capacitor tank. The design process and consideration is discussed, as well as the measurement(More)
1 1 The authors would like to acknowledge the supports from DARPA and FCRP GSRC for this research. ABSTRACT In this paper, we propose a new way of implementing on-chip global interconnect that would meet stringent challenges of core-to-core communications in latency, data rate, and re-configurability for future chip-microprocessors (CMP) with efficient area(More)