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In this paper, we explore the use of multi-band radio frequency interconnect (or RF-I) with signal propagation at the speed of light to provide shortcuts in a many core network-on-chip (NoC) mesh topology. We investigate the costs associated with this technology, and examine the latency and bandwidth benefits that it can provide. Assuming a 400(More)
As chip multiprocessors scale to a greater number of processing cores, on-chip interconnection networks will experience dramatic increases in both bandwidth demand and power dissipation. Fortunately, promising gains can be realized via integration of Radio Frequency Interconnect (RF-I) through on-chip transmission lines with traditional interconnects(More)
In this paper, we propose a new way of implementing on-chip global interconnect that would meet stringent challenges of core-to-core communications in latency, data rate, and re-configurability for future chip-microprocessors (CMP) with efficient area and energy overheads. We discuss the limitation of traditional RC-limited interconnects and possible(More)
Two fundamental oscillators, a 240 GHz and a 272 GHz are demonstrated using the IBM CMOS 32 nm process. The design of both oscillators was based on a Colpitts differential topology, where parasitic capacitances of the device are used as a part of the inductor-capacitor tank. The design process and consideration is discussed, as well as the measurement(More)
We present an analytical model, design, and measurement results on fundamental, harmonic, and subharmonic down conversion mixing approaches in 65-nm CMOS around and above the transistor cutoff frequency fmax, targeting submillimeter-wave operation. Analytical expressions for the mixing approaches are derived and compared with the simulation and measurement(More)
A new technique using a left-handed (LH) resonator to generate a multiband millimeter-wave carrier signal is proposed in this paper. The LH resonator exhibits nonlinear dispersion characteristic, which enables uneven spacing between resonant frequencies. With <i>N</i> stages of the LH unit cell, there are <i>N</i>/2 +1 resonant frequencies from the(More)
In this paper, we propose a new way of implementing on-chip global interconnect that would meet stringent challenges of coreto-core communications in latency, data rate, and reconfigurability for future chip-microprocessors (CMP) with efficient area and energy overheads. We discuss the limitation of traditional RC-limited interconnects and possible benefits(More)
Third-harmonic current generation in a CMOS transistor is modeled and analyzed including the effects of large-signal clipping and high-frequency roll-off for the application of millimeter-wave (mm-wave) frequency multipliers. Using the model and introducing harmonic rejection techniques, a wideband 8.5-dBm output-power x9 frequency multiplier from(More)
A Colpitts mm-wave VCO is used for modulating and de-modulating high data rates using two modes of operation, enabling multi-Gbps transceiver with small size and low power. As a VCO 4 GHz tuning range is achieved with a peak output power of +5 dBm at 87 GHz and a phase noise of -93 dBc/Hz at 1 MHz offset. Gate bias modulation achieves up to 6 Gbps ASK(More)