Enrique Aparicio

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  • Bertrand Le Gratiet, Pascal Gouraud, Enrique Aparicio, Laurene Babaud, Karen Dabertrand, Mathieu Touchet +10 others
  • 2009
This paper present an evaluation of our CMOS 45nm gate patterning process performance based on immersion lithography in a production environment. A CD budget breakdown is shown detailing lot to lot, wafer to wafer, intrawafer, intrafield and proximity CD uniformity characterization. Emphasis is given on scatterometry library development and deployment. We(More)
Models are a useful tool to increase the developer’s productivity and satisfaction when performing maintenance tasks. However, in order to maximise these advantages, the right selection of notations must be made. Unfortunately, the software engineering field lacks a body of empirical evidence that supports such selection. A suboptimal decision in this(More)
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