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—This paper proposes an efficient Quasi-Monte Carlo based yield aware analog circuit synthesis tool with an adaptive sampling mechanism. Monte Carlo (MC) analysis is commonly preferred to estimate process variation effects on the yield of manufactured ICs. However, conventional MC requires a large number of simulations for accurate estimation. This(More)
Analog circuit sizing has become a very challenging process due to increased non-idealities for advanced technology nodes. Moreover, reliability of circuits has become a major concern, where process variations and aging phenomena have been substantially worsened in deep-sub-micron devices. Thereby, traditional circuit optimization tools have been replaced(More)
Efficient yield estimation methods are required by yield aware automatic sizing tools, where many iterative variability analyses are performed. Quasi Monte Carlo (QMC) is a popular approach, in which samples are generated more homogeneously, hence faster convergence is obtained compared to the conventional MC. However, since QMC is deterministic and has no(More)
—Failure due to aging mechanisms is an important concern for RF circuits. In-field aging results in continuous degradation of circuit performances before they cause catastrophic failures. In this regard, the lifetime of RF/analog circuits, which is defined as the point where at least one specification fails, is not just determined by aging at the device(More)