Engin Afacan

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This paper proposes an efficient Quasi-Monte Carlo based yield aware analog circuit synthesis tool with an adaptive sampling mechanism. Monte Carlo (MC) analysis is commonly preferred to estimate process variation effects on the yield of manufactured ICs. However, conventional MC requires a large number of simulations for accurate estimation. This situation(More)
Analog circuit sizing has become a very challenging process due to increased non-idealities for advanced technology nodes. Moreover, reliability of circuits has become a major concern, where process variations and aging phenomena have been substantially worsened in deep-sub-micron devices. Thereby, traditional circuit optimization tools have been replaced(More)
In this paper, reliability of CMOS differential cross-coupled LC oscillators is examined, and a novel on chip aging detection and healing technique is developed to increase the lifetime of oscillator circuits. Aging causes degradation in several transistor parameters, such as threshold voltage, mobility, and transconductance. While these changes cause(More)
The design of complex analog circuits by using flat optimization-based approaches is inefficient, even impossible, due to the high number of design variables and the growth of the cost of performance evaluation with the circuit size. Over the past two decades, top-down hierarchical design approaches have been developed and applied. They are based on(More)
Efficient yield estimation methods are required by yield aware automatic sizing tools, where many iterative variability analyses are performed. Quasi Monte Carlo (QMC) is a popular approach, in which samples are generated more homogeneously, hence faster convergence is obtained compared to the conventional MC. However, since QMC is deterministic and has no(More)
Modelling of the degradation mechanisms has a crucial role during the aging analysis, which determines the accuracy of the lifetime estimation. Conventionally, analytical and semi-empirical models are utilized during the aging analysis. Analytical models employ deterministic equations during the degradation calculation and they can be scaled for different(More)
Reconfigurable circuit design has become very important in the last decade for increasing the lifetime of CMOS circuits in deep sub-micron technologies. Sense & React approach is one of the reconfigurable design approaches, where degradation in a circuit performance is detected via sensor circuitry and a pre-established recovery operation is applied to(More)
Failure due to aging mechanisms is an important concern for RF circuits. In-field aging results in continuous degradation of circuit performances before they cause catastrophic failures. In this regard, the lifetime of RF/analog circuits, which is defined as the point where at least one specification fails, is not just determined by aging at the device(More)