En-Shou Chang

Learn More
An important decision in synthesizing a hardware implementation from a behavioral description is selecting the clock period to schedule the datapath operations into control steps. Prior to scheduling, most existing behavioral synthesis systems either require the designer to specify the clock period explicitly or require that the delays of the operators used(More)
In this report, we describe the specify-explore-re ne (SER) co-design methodology for design of embedded systems. We describe the necessary design steps in order to map an abstract speci cation of the system to the nal implementation model. We propose a co-design tool based on our co-design methodology. We also present a graphical user interface for the(More)
HLS scheduling algorithms can not be applied on system-level synthesis due to the following problems: The control-step is not available at system-level. Mixed concurrent and exclusive execution ows Synchronization among objects scheduled Execution time of objects scheduled may not be determined until run-time. In this paper, we present a data-structure to(More)
  • 1