Elana D. Granston

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Memory hierarchies are used by multiprocessor systems to reduce large memory access times. It is necessary to automatically manage such a hierarchy, to obtain effective memory utilization. In this paper, we discuss the various issues involved in obtaining an optimal memory management strategy for a memory hierarchy. We present an algorithm for finding the(More)
Temam+, Elana D. Granston~ William Jalby~ University of Leiden, In recent years, loop tiling has become an increasingly popular technique for increasing cache effectiveness. This is accomplished by transforming a loop nest so that the temporal and spatial locality can be better exploited for a given cache size. However, this optimization only targets the(More)
While many optimizations can yield substantial performance improvements under the right circumstances, these same optimizations may cause significant performance degradations or cause other problems under the wrong circumstances. The problem of determining which optimizations to apply is generally relegated to the over-burdened compiler user, who must wade(More)
In recent years, loop tiling has become an increasingly popular technique for increasing cache eeectiveness. This is accomplished by transforming a loop nest so that the temporal and spatial locality can be better exploited for a given cache size. However, this optimization only targets the reduction of capacity misses. As recently demonstrated by several(More)
events that facilitate navigation of clean points. W e will also try to wean programmers from expecting iterations in a loop nest to be executed in the standard sequential order. Suppose that, instead of setting unconditional breakpoints in the code and stepping through them the proper number of times until an iteration of interest is reached, programmers(More)
In large-scale multiprocessors, whether loosely or tightly coupled, some memory is cheaper to access than other memory. Because direct management of memory on these machines is quite burdensome to the programmer, much research effort has been directed toward providing a shared virtual memory (SVM) interface. Clearly, the success of this endeavor depends(More)
In traditional precedence-constrained scheduling a task is ready to execute when all its predecessors are completed. We call such a task an AND task. In many applications there are tasks which are ready to execute when some but not all of their predecessors are complete. We call these tasks OR tasks. The resultant task system, containing both AND and OR(More)