Learn More
We describe the Lutonium, an asynchronous 8051 microcontroller designed for low Et. In 0.18m CMOS, at nominal 1.8 V, we expect a performance of 0.5 nJ per instruction at 200 MIPS. At 0.5 V, we expect 4 MIPS and 40 pJ/instruction, corresponding to 25,000 MIPS/Watt. We describe the structure of a fine-grain pipeline optimized for Et efficiency, some of the(More)
This work explores the design and capabilities of a three-dimensional cross-point array structure suitable for use with resistance-change non-volatile memory. The resistance-change cell serves as both the access element and the memory element, eliminating the need for individual selection devices. This work presents novel architecture and circuit techniques(More)
We describe the capabilities of and algorithms used in ROMantic, a tool for generating asynchronous read-only memory. ROMantic generates ROMs that are optimized for either power or speed. These ROMs are quasi delay-insensitive, and generated from an input file consisting of a value table. Although the algorithms used are based on previously known(More)
In this project, we first find the salient statistical patterns of insider trading 1: Call-put imbalance is large. 2: Total option volume is high. 3: Slightly in-the-money or out-of-the-money option is preferred (by insiders). 4: Near-term option is preferred (by insiders). 5: Near-term implied volatility is high. Then we develop methodologies to detect(More)
  • 1