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— This work evaluates the potential application of emerging non-volatile memory technologies to reconfigurable architectures based on hybrid CMOS/resistive-switching FPGAs. The non-volatility of these devices lends them well to designs requiring low power consumption and reduced configuration time at power up. These memory technologies are assessed based on(More)
We describe the capabilities of and algorithms used in ROMantic, a tool for generating asynchronous read-only memory. ROMantic generates ROMs that are optimized for either power or speed. These ROMs are quasi delay-insensitive, and generated from an input file consisting of a value table. Although the algorithms used are based on previously known(More)
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