Ehrenfried Zschech

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Incorporation of all important atom migration driving forces into the mass balance equation and its solution together with solution of the coupled electromagnetics, heat transfer, and elasticity problems allows one to simulate electromigration (EM)-induced degradation in a variety of dual-inlaid Cu interconnect segments characterized by different dominant(More)
Performance and functionality of microelectronic devices have increased continuously by increasing transistor integration densities (" More Moore ") over more then four decades. However, today it has become questionable if this development alone will be able to overcome the predicted performance and cost issues as well as time to market for new product(More)
Managing the emerging internal mechanical stress in chips, particularly if they are 3D stacked, is a key task to maintain performance and reliability of microelectronic products. Hence, a strong need of a physics based simulation methodology emerges. This physics-based simulation, however, requires material parameters with high accuracy. A full-chip(More)
• By decreasing the accelerating voltage, the severe shrinkage in the OSG thin films can be dramatically reduced, and it can be even avoided by working with Ep 1 BLOCKINkV. • Working with a shorter value of working distance (WD 2 mm) is an essential requirement to image with low E p , in order to improve the resolution. • The energy selective(More)
In this paper, EM-induced degradation processes and failure in on-chip interconnects are discussed based on experimental studies. In-situ microscopy studies at embedded via/line dual inlaid copper interconnect test structures show that void formation and evolution depend on both interface bonding and microstructure. In future, copper microstructure becomes(More)
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