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Direct-mapped caches are often plagued by conflict misses because they lack the associativity to store more than one memory block in each set. However, some blocks that have no temporal locality actually cause program execution degradation by displacing blocks that do manifest temporal behavior. In this paper, we present a simple but efficient novel(More)
The diierence in processor and main memory cycle time has necessitated the use of aggressive prefetching techniques to reduce or hide main memory access latency. However, prefetching can signiicantly increase memory bandwidth and unsuccessful prefetches may even pollute the primary cache. Although the current metrics, coverage and accuracy, do provide an(More)
<i>Data cache misses reduce the performance of wide-issue processors by stalling the data supply to the processor. Prefetching data by predicting the miss address is one way to tolerate the cache miss latencies. But current applications with irregular access patterns make it difficult to accurately predict the address sufficiently early to mask large cache(More)
Modulo scheduling is an eecient technique for exploiting instruction level parallelism in a variety of loops, resulting in high performance code but increased register requirements. We present a set of low computational complexity stage-scheduling heuristics that reduce the register requirements of a given modulo schedule by shifting operations by multiples(More)
Highly aggressive multi-issue processor designs of the past few years and projections for the decade, require that we redesign the operation of the cache memory system. The number of instructions that must be processed (including incorrectly predicted ones) will approach 16 or more per cycle. Since memory operations account for about a third of all(More)
Eighty psychology students were administered a short self-report questionnaire that probed their initial and most recent experiences with cocaine. Most of the subjects were relatively inexperienced with cocaine; only five had used the drug more than 40 times. Measures of Global Positive and Global Negative responses to cocaine use were obtained. There was(More)
Acute exposure to methylphenidate (0.0, 5.0, 10.0, or 20.0 mg/kg) or amphetamine (0.0, 0.5, 1.0, 2.0, or 4.0 mg/kg) dose-dependently increased horizontal activity. The amphetamine-induced increase in activity was progressively augmented with repeated exposures over 7 days. In contrast, methylphenidate (20.0 mg/kg)-induced increases in activity became(More)
More and more scientists and engineers are becoming interested in using supercomputers. Earlier barriers to using these machines are disappearing as software for their use improves. Meanwhile, new parallel supercomputer architectures are emerging that may provide rapid growth in performance. These systems may use a large number of processors with an(More)
Modulo scheduling is an eecient technique for exploiting instruction level parallelism in a variety of loops, resulting in high performance c ode but increased r egister requirements. We present a combined approach that schedules the loop operations for the highest steady state throughput and minimum register requirements. Our method determines optimal(More)