Edward Flanigan

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The use of linear dependency relationships among path delay faults (PDFs) is an effective way to determine circuit timing characteristics. The proposed approach improves the performance of performing a linear dependency check by accelerating the Gauss elimination process. This paper presents new algorithms to represent a PDF with respect to a testable set(More)
Recently several methods have been presented to measure the delay of a small set of path delay faults (PDFs), known as a basis set which is used to compute the delays of PDFs. All methods assume that the basis consists of strong robustly tested PDFs because their delays can be measured. This paper presents procedures to identify measurable PDFs whose delays(More)
A recent decision diagram-based algorithm [12] was able to generate test patterns for each sensitizable path delay fault. Although scalable this approach results to prohibitively long test sets. This paper presents a novel technique to intelligently select paths for compaction. It guarantees optimal compaction subject to the order of processing faults. The(More)
This paper presents a novel approach for identifying non-robustly unsensitizable paths using the bounded gate delay model. It is shown that many non-robust paths will remain undetected unless the delay values are calculated at the path level rather than considering calculations at the circuit level bounded delay. As an initial step a canonical data(More)
This paper presents a novel function-based test generation technique for path delay faults (PDFs) under the launch-off-capture (LOC) scan architecture. The LOC architecture imposes the condition that the second test pattern must be a functional response of the initial scan test pattern. The proposed function-based LOC methodology incorporates traditional(More)
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