Eduardo de la Torre

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The growth of sensor networks during the last years is a fact and within this field, wireless sensor networks are growing particularly as there are many applications that demand the use of many nodes, even hundreds or thousands. More and more applications are emerging to solve several problems in data acquisition and control in different environments,(More)
Specific features of Wireless Sensor Networks (WSNs) like the open accessibility to nodes, or the easy observability of radio communications, lead to severe security challenges. The application of traditional security schemes on sensor nodes is limited due to the restricted computation capability, low-power availability, and the inherent low data rate. In(More)
This paper presents a tool for Virtex II (Pro) FPGA partial bitstream manipulation suited for reconfigurable control systems with limited computing resources. The basics for partial bitstream manipulation in Virtex II (Pro) FPGAs are shown, including bit allocation equations that could be used to create such tools. After that, a tool for partial bitstream(More)
While for years traditional wireless sensor nodes have been based on ultra-low power microcontrollers with sufficient but limited computing power, the complexity and number of tasks of today's applications are constantly increasing. Increasing the node duty cycle is not feasible in all cases, so in many cases more computing power is required. This extra(More)
The use of reconfigurable hardware (HW) can improve the processing performance of many systems, including Wireless Sensor Networks (WSNs). Moreover, reconfigurable devices permit remote and runtime HW reconfiguration, which implies benefits in WSNs deployment and maintainability and, finally, cost reduction. In this paper, WSN node runtime reconfigurability(More)
This paper presents an analysis of the fault tolerance achieved by an autonomous, fully embedded evolvable hardware system, which uses a combination of partial dynamic reconfiguration and an evolutionary algorithm (EA). It demonstrates that the system may self-recover from both transient and cumulative permanent faults. This self-adaptive system, based on a(More)
In this paper, a new countermeasure against power and electromagnetic (EM) Side Channel Attacks (SCA) on FPGA implemented cryptographic algorithms is proposed. This structure mainly focuses on a critical vulnerability, Early Evaluation, also known as Early Propagation Effect (EPE), which exists in most conventional SCA-hardened DPL (Dual-rail with Precharge(More)