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A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time
TLDR
A latch-type voltage sense amplifier in 90nm CMOS is designed with a separated input and cross-coupled stage for fast operation over a wide common-mode voltage range. Expand
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Tunable High-Q N-Path Band-Pass Filters: Modeling and Verification
TLDR
An integrated tunable band-pass filter based on N-path periodically time-variant networks is analyzed, implemented, and measured. Expand
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Jitter Analysis and a Benchmarking Figure-of-Merit for Phase-Locked Loops
TLDR
This brief analyzes the jitter as well as the power dissipation of phase-locked loops (PLLs). Expand
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A 1.9μW 4.4fJ/Conversion-step 10b 1MS/s Charge-Redistribution ADC
TLDR
An ADC for energy scavenging is proposed using a charge-redistribution DAC, a dynamic 2-stage comparator, and a delay-line-based controller realized in CMOS. Expand
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A 10-bit Charge-Redistribution ADC Consuming 1.9 $\mu$W at 1 MS/s
TLDR
This paper presents a 10 bit successive approximation ADC that has been implemented in 65 nm CMOS for which technology scaling is advantageous. Expand
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Unified Frequency-Domain Analysis of Switched-Series-$RC$ Passive Mixers and Samplers
TLDR
A wide variety of voltage mixers and samplers are implemented with similar circuits employing switches, resistors, and capacitors. Expand
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A 2.2GHz 7.6mW sub-sampling PLL with −126dBc/Hz in-band phase noise and 0.15psrms jitter in 0.18µm CMOS
TLDR
This paper presents a 2.2GHz clock-generation PLL that uses a phase-detector/charge-pump that sub-samples the VCO output with the reference clock. Expand
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A 0.2-to-2.0GHz 65nm CMOS receiver without LNA achieving ≫11dBm IIP3 and ≪6.5 dB NF
TLDR
Spurious-free dynamic range (SFDR) is a key specification of radio receivers and spectrum analyzers, characterizing the maximum distance between signal and noise+distortion. Expand
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Tunable N-Path Notch Filters for Blocker Suppression: Modeling and Verification
TLDR
N-path switched-RC circuits can realize filters with very high linearity and compression point while they are tunable by a clock frequency. Expand
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Analog/RF Solutions Enabling Compact Full-Duplex Radios
TLDR
In-band full-duplex sets challenging requirements for wireless communication radios, in particular their capability to prevent receiver sensitivity degradation due to self-interference (transmit signals leaking into its own receiver). Expand
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