E. Martin Albarran

  • Citations Per Year
Learn More
The paper describes the design of a front-end chip for hybrid pixel detectors optimized for good timing resolution (200 ps rms) and high event rate (150 kHz per pixel). Each channel consists of a fast transimpedance amplifier with 5 ns peaking time, a constant fraction discriminator (CFD), and a Time-to-Digital Converter (TDC). In order to cope with the(More)
The paper presents test results of a front-end ASIC developed for fast timing applications with silicon pixel detectors. Implemented in a 0.13 μm CMOS process, the prototype integrates 107 read-out cells. In an area of 300 μm × 300 μm each cell incorporates a fast transimpedance amplifier with 3 ns peaking time, a Constant(More)
  • 1