E.J. McCluskey

Learn More
A methodology for automatically synthesizing a testable RTL (register-transfer-level) hardware specification from a behavioral VHDL (VHSIC hardware description language) specification is presented. Behavioral synthesis is described. It consists of the automatic creation of a hardware specification, given an input specification that describes how the(More)
Summary form only given. This paper is an attempt to identify the basic concerns in digital IC production testing. The details, too often, crowd in and prevent us from understanding why we are having difficulties: why testing is too costly or why too many bad chips escape (pass) the test despite our best efforts. Then some of the myths representing the(More)
  • 1