Dustin Peterson

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—FPGA circuit implementation is a unidirectional and time-consuming process. Existing approaches like the incremental synthesis try to shorten it, but still need to execute the whole flow for a changed circuit partition. Other approaches circumvent process stages by providing bidirectional mappings between their results. In this paper we propose an approach(More)
Providing secure access to confidential information is extremely difficult, notably when regarding weak endpoints and users. With the increasing number of corporate espionage cases and data leaks, a usable approach enhancing the security of data on endpoints is needed. In this paper we present our implementation for providing a new level of security for(More)
This paper introduces an FPGA-based fault injection system. To realize this system a library was developed, which implements a static mapping between a circuit described at RTL or gate-level and its corresponding placed and routed FPGA design. The aim of this mapping is to preserve module and port structure of the placed and routed FPGA design to the(More)
Advances in SOI technology such as STMicro's 28nm UTBB-FDSOI enabled a renaissance of body biasing. Body biasing is a fast and efficient technique to change power and performance characteristics. As the electrical task to change the substrate potential is small compared to Dynamic Voltage Scaling, much finer island sizes are conceivable. This however(More)
In the continued absence of an effective anti-HIV vaccine, approximately 2 million new HIV infections occur every year, with over 95% of these in developing countries. Calls have been made for the development of anti-HIV drugs that can be formulated for topical use to prevent HIV transmission during sexual intercourse. Because these drugs are principally(More)
We propose a methodology for the generation of sleep modes traces. Sleep mode traces identify idle times of components in a design and are used in state-of-the-art power optimization approaches. While designers are currently forced to generate them manually, our graph-based method enables a full automation of this process. We implemented our methodology in(More)
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