Duaine Pryor

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A transaction-based layered architecture providing for 100% portability of a C-based testbench between simulation and emulation is proposed. Transaction-based communication results in performance which is commensurate with emulation without a hardware target. Testbench portability eliminates duplicated effort when combining system level simulation and(More)
Faced with continually coping with Moore's Law, computer-aided design (CAD) for integrated circuits is used to facing challenges in our ever-evolving design problem. Increasing device complexity is a perennial challenge and has led to several discontinuities in design methodology. Over the last decade deep submicron physical effects have significantly(More)
—The availability of millions of transistors on a single chip has allowed the creation of complex on-chip systems. The functional verification of such systems has become a challenge. Simulation run times are increasing, and emulation is now a necessity. Creating separate verification environments for simulation and emulation slows the design cycle and it(More)
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