Dong-woo Kang

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This paper presents a novel 4-bit phase shifter using distributed active switches in 0.18-mum RF CMOS technology. The relative phase shift, which varies from 0deg to 360deg in steps of 22.5deg, is achieved with a 3-bit distributed phase shifter and a 180deg high-pass/low-pass phase shifter. The distributed phase shifter is implemented using distributed(More)
A digital 5-bit phase shifter at Ku-band is presented, which is implemented with 0.18-mum RFCMOS technology. n-MOSFET switches and top metal microstrip lines with a first-metal ground allow the phase shifter to have small insertion losses. The proposed 90deg phase shifter utilizing a parallel resonator exhibits broad-band characteristics. All of the circuit(More)
Ka-band SiGe BiCMOS single- and four-element phased arrays capable of both transmit and receive operation with 5-bit phase and amplitude control are presented. The design is based on the All-RF architecture with RF phase shifters and attenuators, and a 4:1 passive power combining/dividing network. The four-element array results in an average gain of ~ 0 dB(More)
This paper presents the design and analysis of an improved wideband in-phase/quadrature (I/Q) network and its implementation in a wideband phased-array front-end. It is found that the addition of two resistors (<i>R</i><sub>s</sub>) in the all-pass I/Q network results in improved amplitude and phase performance versus capacitance loading and frequency,(More)
This paper presents a 16-element Q-band transmit/ receive phased array with high receive linearity and low power consumption. The design is based on the all-RF architecture with passive phase shifters and a 1:16 Wilkinson network. An input P<sub>1dB</sub> from -9 to -10 dBm and a noise figure of 10-11.5 dB at 44-46 GHz is achieved in the receive mode with a(More)
This paper presents a Ku-band SiGe BiCMOS phased array receive chip capable of forming four-simultaneous beams from two antenna inputs. The design is based on the all-RF architecture with 4-bit active phase shifters and 4-bit variable gain amplifiers in each channel. The four-beam chip results in a gain of 4-6 dB per channel at 13-15 GHz, a noise figure of(More)
This paper presents a four-element X-band phased-array transmitter in 0.13-&#x03BC;m CMOS. The design is based on the all-RF architecture and contains a 5-bit phase shifter (lowest bit is used as a trim bit), 4-bit gain control (to reduce the rms gain error), and power amplifiers capable of delivering a PSAT of 13.5 dBm per channel at 8.5-10.5 GHz. The chip(More)
This paper presents RFIC phased array receive chips capable of formation 2and 4simultaneous beams from the same antenna input with 4-bit amplitude and phase control. The design is based on a SiGe BiCMOS process (Jazz SiGe18Hx) and results in excellent isolation between the different beams. The 2beam chip results in a gain of 5-6 dB per channel at 14-15 GHz,(More)
This paper describes a digital true time-delay phase shifter implemented in 0.18-mum CMOS process for ultra-wideband phased array application. The phase shifter exhibits linear phase change versus frequency, digital control, low insertion loss, and reduced circuit size. Shunt-series peaked load increases the bandwidth of the phase shifter, yielding a flat(More)