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Journals and Conferences
We demonstrate analytical frequency-domain transfer function expressions for an optical random access memory (RAM) cell that employs two SOA-based ON/OFF switches and two coupled SOA-MZI gates forming an optical flip-flop. Our theoretical model relies on first-order perturbation theory approximations applied for the first time to coupled optical switching… (More)
We demonstrate a 16GHz physical layer optical cache memory architecture for direct mapping associativity, organized in four cache lines with every line being capable of storing two bytes of optical data. WDM formatting of both the memory address and the optical data words is exploited, while the proposed design relies on the interconnection of subsystems… (More)
In this paper, we demonstrate a novel RAM cell based only on three traveling waveguide semiconductor optical amplifier-cross gain modulation (SOA-XGM) switches. The RAM cell features wavelength diversity in the incoming bit signals and provides Read/Write operation capability with true random access exclusively in the optical domain. Two of the SOA-XGM… (More)
Optical RAM appears to be the alternative approach towards overcoming the “Memory Wall” of electronics, suggesting use of light in RAM architectures to enable ps-regime memory access times. In this communication we take advantage of the wavelength properties of optical signals to present new architectural perspectives in optical RAM structures… (More)
We demonstrate a novel optical SR-flip flop with simple architecture, employing only two SOA XGM switches. Proof-of-principle operation is experimentally demonstrated at 8 Mb/s and numerically evaluated at 10 Gb/s.
The authors demonstrate a novel all-optical T-flip-flop (TFF) layout utilizing a single optical latching element that comprises an integrated semiconductor optical amplifier and Mach-Zehnder inteferometer and a feedback loop. Experimental proof-of-concept verification is presented at 8 Mb/s using off-the-shelf bulk components and a fiber-based feedback… (More)
We demonstrate a novel 16GHz physical layer optical cache memory architecture for the 2-way set associative cache mapping scheme. Both memory addresses and optical words are WDM-formatted while physical layer simulations demonstrate successful Read/Write operation.
In this article, we review our recent work in WDM-enabled optical RAM bank architectures and their optical all-passive peripheral modules that form a complete 16GHz optical cache memory physical layer design for Chip Multiprocessor configurations and we report on recently integrated InP-optical memory cells as the fundamental building blocks.
We report on the simultaneous wavelength conversion operation of a dual-element semiconductor optical amplifier-Mach-Zehnder interferometer (SOA-MZI) array hybridly integrated on a 4-μm silicon-on-insulator (SOI) waveguide platform through thermocompression bonding. The SOAs are part of a six-element SOA array with both facets coupled on SOI through… (More)
We demonstrate a frequency and time domain analysis for optical random access memory (RAM) cells that rely on semiconductor optical amplifier (SOA)-based switches but employ different switching mechanisms. The first RAM cell utilizes SOA cross gain modulation (XGM) switches both for the access gate as well as latching mechanism, whereas the second RAM cell… (More)