Due to inherent factors such as a small and fragmented market and rapid hardware obsolescence, the conventional textbook is inadequate for DSP laboratory education. Freely available open-content materials that enable and promote both local customization and further development by a community of educators offers a fresh approach to lab text development that… (More)
This module introduces adaptive lters through the example of system identication using the LMS algorithm. The adaptive lter adjusts its coecients to minimize the mean-square error between its output and that of an unknown system.
Speech analysis and synthesis with Linear Predictive Coding (LPC) exploit the predictable nature of speech signals. Cross-correlation, autocorrelation, and autocovariance provide the mathematical tools to determine this predictability. If we know the autocorrelation of the speech sequence, we can use the Levinson-Durbin algorithm to nd an ecient solution to… (More)
The phase-locked loop (PLL) is a critical component in coherent communications receivers that is responsible for locking on to the carrier of a received modulated signal. A PLL adjusts the phase of a numerically-controlled oscillator to match that of the received signal. You will simulate a carrier recovery subsystem in MATLAB and then implement the… (More)
The TI TMS320C55x microprocessor provides a number of ways to specify the location of data to be used in calculations. Immediate addressing, direct addressing, and indirect addressing are the three main types. Knowing the basic addressing modes of a microprocessor is important because they map directly into assembly language syntax and because the need to… (More)
Two's-complement notation is a mathematically convenient way of representing signed numbers in microprocessors. The most signicant bit of a two's complement number represents its sign, and the remaining bits represent its magnitude. Fractional arithmetic allows one to multiply numbers on an integer processor without incurring over-ow. Fractional arithmetic… (More)
The goal of symbol-timing recovery is to sample message signals at the receiver for best performance. After the in-phase and quadrature signals pass through a matched lter, a delay-locked loop attempts to nd the peaks in the output waveforms.
1 This text builds on over fourteen years of DSP laboratory instruction and over ten years of collaborative development of instructional laboratory materials. The content has evolved in tandem with ECE 320: Digital Signal Processing Laboratory, a senior-level, two-credit-hour elective laboratory course at the University of Illinois at Urbana-Champaign, and… (More)