- Full text PDF available (1)
- This year (1)
- Last five years (3)
This thesis describes a novel approach for distributing low skew clock signals across large digital systems independent of environmental and process variations. The technique is integrated into a multi-output clock buffer circuit that can handle a scalable number of clock loads in a point-to-point configuration. The circuit contains an impedance-locked loop… (More)
BACKGROUND Pediatric appendicitis is a common, potentially serious condition. Determining perforation status is crucial to planning effective management. PURPOSE Determine the efficacy of serum total bilirubin concentration [STBC] in distinguishing perforation status in children with appendicitis. METHODS Retrospective review of 257 cases of… (More)
A self-terminated line driver suitable for fast Ethernet operates in class AB mode and combines digital signal processing with low-power analog circuits. It dissipates 108mW, 48% less than an existing state-of-the-art design. It occupies 0.22mm<sup>2</sup> in a 65nm standard CMOS technology and operates from a 2.5V supply.