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This paper describes the implementation of an energy-efficient digital SDR baseband platform. The multi processor system-on-chip (MPSOC) is implemented in 90nm CMOS technology and occupies 32mm2. It incorporates all digital signal processing required by the physical layer of the WiFi(802.11n), WiMax(802.16e), mobile TV and 3GPP-LTE standards. The(More)
The increasing demand for multimodal wireless communication is driving designers towards software defined radio (SDR). Therefore, new high performance reconfigurable platforms for baseband digital signal processing are required. Due to their flexibility, with low reconfiguration overhead, performance and energy efficiency, coarse grain reconfigurable arrays(More)
S. A. Hanna, MRCS, Research Registrar A. Amin, MRCS, Specialist Registrar R. C. Pollock, FRCS, Consultant Orthopaedic Surgeon J. A. Skinner, FRCS, Consultant Orthopaedic Surgeon S. R. Cannon, MCh(Orth), FRCS, Consultant Orthopaedic Surgeon T. W. R. Briggs, MCh(Orth), FRCS, Consultant Orthopaedic Surgeon Department of Orthopaedic Oncology R. Tirabosco, MD,(More)
Motor learning tasks are often classified into adaptation tasks, which involve the recalibration of an existing control policy (the mapping that determines both feedforward and feedback commands), and skill-learning tasks, requiring the acquisition of new control policies. We show here that this distinction also applies to two different visuomotor(More)
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