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—Emerging nonvolatile memories (ENVMs) such as phase-change random access memories (PCRAMs) or oxide-based resistive random access memories (OxRRAMs) are promising candidates to replace Flash and Static Random Access Memories in many applications. This paper introduces a novel set of building blocks for field-programmable gate arrays (FPGAs) using ENVMs. We(More)
Nanosystems are large-scale integrated systems exploiting nanoelectronic devices. In this study, we consider double independent gate, vertically stacked nanowire field effect transistors (FETs) with gate-all-around structures and typical diameter of 20 nm. These devices, which we have successfully fabricated and evaluated, control the ambipolar behaviour of(More)
—This paper reports on the memory and memris-tive effects of Schottky barrier field effect transistors (SBFET) with gate-all-around (GAA) configuration and Si nanowire (SiNW) channel. Similar behavior has also been investigated for SBFETs with poly-Si nanowire (poly-SiNW) channel in back-gate configuration. The memristive devices presented here have the(More)
Memristive devices have the potential for a complete renewal of the electron devices landscape, including memory, logic and sensing applications. This is especially true when considering that the memristive functionality is not limited to two-terminal devices, whose practical realization has been demonstrated within a broad range of different technologies.(More)
—The invention of the memristor enables new possibilities for computation and non-volatile memory storage. In this paper we propose a Generic Memristive Structure (GMS) for 3-D FPGA applications. The GMS cell is demonstrated to be utilized for steering logic useful for multiplexing signals, thus replacing the traditional pass-gates in FPGAs. Moreover, the(More)
<i>Vertically stacked nanowire FETs</i> (NWFETs) with gate-all-around structure are the natural and most advanced extension of FinFETs. At advanced technology nodes, many devices exhibit ambipolar behavior, i.e., the device shows <i>n</i>- and <i>p</i>-type characteristics simultaneously. In this paper, we show that, by engineering of the contacts and by(More)
—In this letter, we report on the fabrication and characterization of titanium dioxide (TiO 2)-based resistive RAM (ReRAM) cointegration with 380 μm-height Cu through-silicon via (TSV) arrays for programmable 3-D interconnects. Nonvolatile resistive switching of Pt/TiO 2 /Pt thin films is first characterized with a resistance ratio up to five orders of(More)
Ambipolar transistors with on-line configurability to n-type and p-type polarity are desirable for future integrated circuits. Regular logic tiles have been recognized as an efficient layout fabric for ambipolar devices. In this work, we present a process/design co-optimization approach for designing logic tiles for <i>double-gate silicon nanowire field(More)
We report on a top-down complementary metal oxide semiconductor (CMOS) compatible fabrication method of ultra-high density Si nanowire (SiNW) arrays using a time multiplexed alternating process (TMAP) with low temperature budget. The flexibility of the fabrication methodology is demonstrated for curved and straight SiNW arrays with different shapes and(More)