David J. Mountain

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Researchers have been studying threshold logic gates for more than 70 years, but industry has largely ignored this design approach because of the dominance of Boolean logic and CMOS fabrication. But emerging technologies, such as memristors, are making the implementation of threshold gates more area and power efficient than CMOS.
Contention of communications across a switched network that connects multiple compute nodes in a distributed-memory cluster may seriously degrade performance of parallel code. The InfiniBand network is the most popular interconnect for compute clusters. While one may correctly assume that increased resource contention leads to decreased application(More)
Social network and medical informatics analysis are examples of modern computing problems that involve large data sets. These data can be represented using graphs, which are are sets of vertices that are connected by edges. While traditional performance benchmarks for high-performance computers measure the speed of arithmetic operations, memory access time(More)
Parallelization of code, using multiple cores/threads, and heterogeneous computing, using the CPU with other devices, has come to the forefront of computing as methods to reduce the execution time of computationally demanding algorithms. For our project, we test various hardware setups on the maya cluster at UMBC, which include multiple nodes and GPUs, by(More)
The Blossom V algorithm is used in graph theory to compute a perfect matching of minimum cost. We conducted performance studies on the algorithm using the maya cluster in the UMBC High Performance Computing Facility to better understand the performance capabilities and emphasize potential approaches for improvement. In the performance studies, we varied the(More)
With power consumption becoming a critical processor design issue, specialized architectures for low power processing are becoming popular. Several studies have shown that neural networks can be used for signal processing and pattern recognition applications. This study examines the design of memristor based multicore neural processors that would be used(More)
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