David B. Janes

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3-Dimensional (3-D) integration offers numerous advantages over conventional structures. Double-gate (DG) transistors can be fabricated for better device characteristics, and multiple device layers can be vertically stacked for better interconnect performance. In this paper, we explore the suitable device structures and interconnect architectures for(More)
The development of nanowire transistors enabled by appropriate dielectrics is of great interest for flexible electronic and display applications. In this study, nanowire field-effect transistors (NW-FETs) composed of individual ZnO nanowires are fabricated using a self-assembled superlattice (SAS) as the gate insulator. The 15-nm SAS film used in this study(More)
Ahsrrucr-3-D technology promises higher integration density and lower interconnection complexity and delay. At present, however, not much work on circuit applications has been done due to lack of insight into 3-D circuit architecture and performance. One of the purposes of realizing 3-D integration b to reduce the interconnect complexity and delay of 2-D,(More)
field effect transistors Suprem R. Das, Collin J. Delker, Dmitri Zakharov, Yong P. Chen, Timothy D. Sands, and David B. Janes Department of Physics, Purdue University, West Lafayette, Indiana 47907, USA School of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana 47907, USA School of Materials Engineering, Purdue University,(More)
Transistors based on various types of nonsilicon nanowires have shown great potential for a variety of applications, especially for those that require transparency and low-temperature substrates. However, critical requirements for circuit functionality, such as saturated source-drain current and matched threshold voltages of individual nanowire transistors(More)
The development of optically transparent and mechanically flexible electronic circuitry is an essential step in the effort to develop next-generation display technologies, including 'see-through' and conformable products. Nanowire transistors (NWTs) are of particular interest for future display devices because of their high carrier mobilities compared with(More)
Three-dimensional (3-D) technology promises higher integration density and lower interconnection complexity and delay. At present, however, not much work on circuit applications has been done due to lack of insight into 3-D circuit architecture and performance. One of the purposes of realizing 3-D integration is to reduce the interconnect complexity and(More)
Nanoscaled Pt conductors were prepared from genetically engineered Tobacco mosaic virus (TMV) templates through Pt cluster deposition on the outer surface of the TMV. Pt clusters were synthesized and deposited on the engineered TMV with surface-exposed cysteine via the in situ mineralization of hexachloroplatinate anions. This deposition was driven by the(More)
Optically transparent, mechanically flexible displays are attractive for next-generation visual technologies and portable electronics. In principle, organic light-emitting diodes (OLEDs) satisfy key requirements for this application-transparency, lightweight, flexibility, and low-temperature fabrication. However, to realize transparent, flexible(More)
3-D technology promises higher integration density and lower interconnection complexity and delay. At present, however, not much work on circuit applications has been done due to lack of insight into 3-D circuit architecture and performance. In this paper, we investigate the interconnect distributions of 3-D circuits. We divide the 3-D interconnects into(More)