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—Solar panels are frequently used in wireless sensor nodes because they can theoretically provide quite a bit of harvested energy. However, they are not a reliable, consistent source of energy because of the Sun's cycles and the ever-changing weather conditions. Thus, in this paper we present a fast, efficient and reliable solar prediction algorithm,(More)
The increasing processing capability of <i>Multi-Processor Systems-on-Chips (MPSoCs)</i> is leading to an increase in chip power dissipation, which in turn leads to significant increase in chip temperature. An important challenge facing the MPSoC designers is to achieve the highest performance system operation that satisfies the temperature and power(More)
Wireless body sensor networks (WBSN) hold the promise to be a key enabling information and communications technology for next-generation patient-centric telecardiology or mobile cardiology solutions. Through enabling continuous remote cardiac monitoring, they have the potential to achieve improved personalization and quality of care, increased ability of(More)
Three dimensional stacked integrated circuits (3D ICs) are extremely attractive for overcoming the barriers in interconnect scaling, offering an opportunity to continue the CMOS performance trends for the next decade. However, from a thermal perspective, vertical integration of high-performance ICs in the form of 3D stacks is highly demanding since the(More)
Meeting the temperature constraints and reducing the hot-spots are critical for achieving reliable and efficient operation of complex multi-core systems. The goal of thermal management is to meet maximum operating temperature constraints, while tracking timevarying performance requirements. Current approaches avoid thermal violations by forcing abrupt(More)
Energy harvesting sensor nodes (EHSNs) have stringent low-energy consumption requirements, but they need to concurrently execute several types of tasks (processing, sensing, actuation, etc.). Furthermore, no accurate models exist to predict the energy harvesting income in order to adapt at run-time the executing set of prioritized tasks. In this article, we(More)
With increasing communication demands of processor and memory cores in <i>Systems on Chips (SoCs)</i>, scalable <i>Networks on Chips (NoCs)</i> are needed to interconnect the cores. For the use of NoCs to be feasible in today's industrial designs, a custom-tailored, application-specific NoC that satisfies the design objectives and constraints of the(More)
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor Systems-On-Chip (MPSoCs) consisting of complex integrated components communicating with each other at very high-speed rates. Intercommunication requirements of MPSoCs made of hundreds of cores will not be feasible using a single shared bus or a(More)
—Today, chip multiprocessors (CMPs) that accommodate multiple processor cores on the same chip have become a reality. As the communication complexity of such multicore systems is rapidly increasing, designing an interconnect architecture with predictable behavior is essential for proper system operation. In CMPs, general-purpose processor cores are used to(More)