Dave Budka

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An innovative post-silicon design validation methodology using recognized industry wide IREM imaging techniques in conjunction with full PC platform enablement was developed, and successfully applied to the IA-32 multiple-core (MC) Nehalem® microprocessor family [1]. Conventional structural based “tester” IREM characterization and debug(More)
FIVR circuitry reaching ~90% power peak efficiency has been implemented on microprocessors made from the world's first 3-dimensional tri-gate 22nm technology node. Post silicon debug techniques to address new challenges imposed on design validation, circuit characterization, and power debug on deep low power core, system, and IO states have been(More)
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