Darryl Jessie

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This paper presents a CMOS VCO in a 0.35 /spl mu/m process which achieves a tuning range of 2.8 GHz-4.55 GHz and phase noise of -142dBc/Hz at 3 MHz offset (from a 1.8 GHz carrier). 5-bit digital coarse-tuning and accumulation-type MOS varactors allow for a 48% tuning range. An integrated regulator provides low supply pushing (100 kHz/V), reduces AM-to-PM(More)
We present circuit topologies and fitting methods that accurately represent on-chip transformers over a frequency sufficient for cellular and PCS circuit analysis. Starting with an S-parameter matrix, obtained through measurement or electromagnetic (EM) simulation, we find an equivalent lumped-element circuit model with minimum fitting error. Consideration(More)
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